Printed circuit board and method for manufacturing same

ABSTRACT

A printed circuit board includes a first outer electrically conductive pattern layer, a first insulation layer, a first inner electrically conductive pattern layer, a connection adhesive sheet, a second inner electrically conductive layer, a second insulation layer, a second outer electrically conductive pattern layer, and a identification mark, which are arranged in that order. The first outer electrically conductive pattern layer includes many first gold fingers. The second outer electrically conductive pattern layer includes many second gold fingers. The blind hole corresponds to the identification mark. The first outer electrically conductive pattern layer, the second outer electrically conductive pattern layer, and the at least one identification mark are simultaneously formed.

BACKGROUND

1. Technical Field

The present disclosure generally relates to printed circuit boards(PCBs), and particularly to printed circuit board having gold fingersand a method for manufacturing the printed circuit board.

2. Description of Related Art

To accommodate development of miniaturized electronic products withmultiple functions, printed circuit boards are widely used due to theirspecial characteristics such as lightness and high-densityinterconnect-ability.

A typical printed circuit board is assembled to another printed circuitboard or an electronic element via gold fingers under a process of hotpressure welding. In the process of the hot pressure welding,identification marks relating to gold fingers are needed to be formed onthe printed circuit board, such that a welding machine can confirm thepositions of the gold finger by identifying the positions of theidentification marks, and then welds the printed circuit board toanother printed circuit board or the electronic element. Therefore,position deviation between the gold fingers and the identification marksis limited to a smaller level, and a method for manufacturing theidentification marks must have high precision. If the position deviationbetween the gold fingers and the identification marks is larger, thegold fingers of the printed circuit board cannot be well assembled toanother printed circuit board or the electronic element in the hotpressure welding process.

What is needed, therefore, is a printed circuit board and a method formanufacturing the printed circuit board to overcome the above-describedproblems.

BRIEF DESCRIPTION OF THE DRAWINGS

Many aspects of the present embodiments can be better understood withreference to the following drawings. The components in the drawings arenot necessarily drawn to scale, the emphasis instead being placed uponclearly illustrating the principles of the present embodiments.Moreover, in the drawings, all the views are schematic, and likereference numerals designate corresponding parts throughout the severalviews.

FIG. 1 is a schematic, cross-sectional view of a first circuit substrateaccording to an exemplary embodiment.

FIG. 2 is a schematic, cross-sectional view of a second circuitsubstrate according to the exemplary embodiment.

FIG. 3 is a top view of the second circuit board of FIG. 2.

FIG. 4 is similar to FIG. 1, but showing a connection adhesive sheetformed on the first circuit substrate.

FIG. 5 is similar to FIG. 3, but showing an inner cover layer formed onthe second circuit board.

FIG. 6 is similar to FIG. 4, but showing through holes defined in thefirst circuit board and the connection adhesive sheet.

FIG. 7 is a schematic, cross-sectional view of showing a laminationbetween the first circuit board and the second circuit substrate.

FIG. 8 is a schematic, cross-sectional view of a printed circuit boardaccording to the exemplary embodiment.

FIG. 9 is a top view of the printed circuit board of FIG. 8.

FIG. 10 is a bottom view of the printed circuit board of FIG. 8.

FIG. 11 is similar to FIG. 8, but showing two outer cover layers formedon the two opposite sides of the printed circuit board.

FIG. 12 is a top view of the printed circuit board of FIG. 11 with theouter cover layers.

FIG. 13 is a bottom view of the printed circuit board of FIG. 11 withthe outer cover layers.

DETAILED DESCRIPTION

A printed circuit board and a method for manufacturing the printedcircuit board according to embodiments will be described with referenceto the drawings.

A method of manufacturing a printed circuit board according to anexemplary embodiment includes the steps as follows.

FIGS. 1 to 3 show step 1, in which a first circuit substrate 110 and asecond circuit substrate 120 are provided.

In the present embodiment, the first circuit substrate 110 includes afirst insulation layer 111, a first inner electrically conductivepattern layer 112, and a first copper foil 113. The first innerelectrically conductive pattern layer 112 and the first copper foil 113are formed at the opposite surfaces of the first insulation layer 111.

The shape and size of the second circuit substrate 120 are identical tothe shape and size of the first circuit substrate 110. The secondcircuit substrate 120 includes a second insulation layer 121, a secondinner electrically conductive pattern layer 122, and a second copperfoil 123. The second inner electrically conductive pattern layer 122 andthe second copper foil 123 are formed on the opposite surfaces of thesecond insulation layer 121. The second circuit substrate 120 includesat least one marking region 124. There is no the second electricallyconductive pattern layer 122 in the marking region 124. That is, themarking region 124 consists of the second insulation layer 121 and thesecond copper foil 123. In the present embodiment, there are two markingregions 124 separated from each other. Each of the marking regions 124is in the shape of a square, and the side length of the marking regions124 is in a range from 0.8 millimeters to 1.0 millimeters. In otherembodiments, the marking region 124 may be a round marking region, or atriangle marking region, or a hexagonal making region, for example.

FIGS. 4 to 5 show step 2, in which a connection adhesive sheet 130 isattached on the first inner electrically conductive pattern layer 112and the surface of the first circuit substrate 110 exposed at the firstinner electrically conductive pattern layer 112, and an inner coverlayer 140 is formed at the second inner electrically conductive patternlayer 122 and the surface of the second circuit substrate 120 exposed atthe second inner electrically conductive pattern layer 122. Theconnection adhesive sheet 130 may be a prepreg.

FIG. 6 shows step 3, in which at least one through hole 101 is definedin the first circuit substrate 110 having the connection adhesive sheet130. The number of the through holes 101 is identical to the number ofthe marking regions 124. The through holes 101 spatially correspond tothe marking regions 124, and each through hole 101 passes through theconnection adhesive sheet 130 and the first circuit substrate 110.

FIG. 7 shows step 4, in which the first circuit substrate 110 islaminated onto the second circuit substrate 120, such that theconnection adhesive sheet 130 is in contact with the inner cover layer140. After lamination, the through holes 101 are respectively alignedwith the marking regions 124.

FIGS. 8-10 show step 4, in which the first copper foil 113 is convertedinto a first outer electrically conductive pattern layer 115, and thesecond copper foil 123 is converted into a second outer electricallyconductive pattern layer 125 with at least one identification mark 126,thereby obtaining a printed circuit board 100. The number of theidentification marks 126 is identical to the number of the markingregions 124. The identification marks 126 are respectively arranged inthe marking regions 124. In the present embodiment, a shape of theidentification mark 126 is the same as a shape of a cross-section of thethrough hole 101 taken in a plane parallel with the first insulationlayer 111, and a size of the identification mark 126 is smaller than asize of the cross-section of the corresponding through hole 101 taken ina plane parallel with the first insulation layer 111.

In the present embodiment, the first outer electrically conductivepattern layer 115, the second outer electrically conductive patternlayer 125, and the at least one identification mark 126 aresimultaneously formed by an image-transfer process and a etchingprocess.

The first outer electrically conductive pattern layer 115 includes aplurality of first electrically conductive traces 1151, and a pluralityof first gold fingers 1152. The first gold fingers 1152 spatiallycorrespond the first electrically conductive traces 1151, and the firstgold fingers 1152 are respectively in contact with and electricallyconnected to the first electrically conductive traces 1151. In thepresent embodiment, the first gold fingers 1152 are positioned betweenthe two through holes 101.

The second outer electrically conductive pattern layer 125 includes aplurality of second electrically conductive traces 1251, and a pluralityof second gold fingers 1252. The second gold fingers 1252 spatiallycorrespond the second electrically conductive traces 1251, and thesecond gold fingers 1252 are respectively in contact with andelectrically connected to the second electrically conductive traces1251. The second copper foil 123 in the marking region 124 is etched tobe an identification mark 126. In the present embodiment, theidentification mark 126 is also in the shape of a square, and the sidelength of the identification mark 126 is in a range from 0.5 millimetersto 0.8. That is, the shape of the identification mark 126 is the same asthe shape of the marking region 124, and the size of the identificationmark 126 is smaller than the size of the marking region 124.

FIGS. 11 to 13 show, in the present embodiment, the method formanufacturing the printed circuit board 100 may further include a step 6of forming a first outer cover layer 150 at a side of the first outerelectrically conductive pattern layer 115, and a second outer coverlayer 160 at a side of the second outer electrically conductive patternlayer 125. A plurality of first openings 151 and a plurality of secondopening 152 are defined in the first outer cover layer 150. The firstopenings 151 spatially correspond to the first gold fingers 1152, andthe first gold finger 1152 are respectively exposed through the firstopenings 151. The second openings 152 spatially correspond to thethrough holes 101, and the second opening 152 respectively communicateswith the through holes 101. A plurality of third openings 161 and fourthopenings 162 are defined in the second outer cover layer 160. The thirdopenings 161 spatially correspond to the second gold fingers 1252, andthe second gold fingers 1252 are respectively exposed through the thirdopenings 161. The fourth openings 162 spatially correspond to theidentification marks 126, and identification mark 126 are respectivelyexposed through the fourth openings 162. A size of a cross-section ofeach fourth opening 162 taken in a plane parallel with the secondinsulation layer 121 is larger than a size of the correspondingidentification mark 126. A size of the cross-section of each fourthopening 162 taken in a plane parallel with the second insulation layer121 is identical to the corresponding marking region 124.

In alternative embodiments, the method for manufacturing the printedcircuit board 100 may be used for manufacturing another multi-layeredprinted circuit board, which has more electrically conductive patternlayer than the printed circuit board 100. That is, when the firstcircuit substrate 110 is laminated onto the second circuit substrate120, there may be one or more third circuit substrates between the firstcircuit substrate 110 and the second circuit substrate 120, and theremay be another connection adhesive sheet between two adjacent thirdcircuit substrates. Each third circuit substrate may includes a thirdinsulation layer and at least one third inner electrically conductivepattern layer formed at a side of the third insulation layer, and atleast one second through hole is defined in the third circuit substrate.The at least one second through hole corresponds to the at least onemarking region 124. After lamination, step 5 to step 6 can successivelybe processed to form another multi-layered printed circuit board havingmore electrically conductive pattern layer than the printed circuitboard 100.

In further alternative embodiments, the step of forming the inner coverlayer 140 on the side of the second inner electrically conductivepattern layer 120 of the second circuit substrate 120 may be omitted, insuch case, there is only the connection adhesive sheet 130 between thefirst inner electrically conductive pattern layer 112 and the secondinner electrically conductive pattern layer 122.

The printed circuit board 100 manufactured by the above method includesthe first outer electrically conductive pattern layer 115, the firstinsulation layer 111, the first inner electrically conductive patternlayer 112, the connection adhesive sheet 130, the inner cover layer 140,the second inner electrically conductive layer 122, the secondinsulation layer 121, the second outer electrically conductive patternlayer 125, and at least one identification mark 126, which are arrangedin that order. At least one blind hole 102 is formed in the printedcircuit board 100. The blind hole 102 only passes through the firstouter electrically conductive pattern layer 115 and the connectionadhesive sheet 130. The first outer electrically conductive patternlayer 115 includes the first electrically conductive traces 1151 and thefirst gold fingers 1152. The second outer electrically conductivepattern layer 125 includes the second electrically conductive trace 1251and the second gold fingers 1252. The at least one identification mark126 corresponds to the at least one blind hole 102. The identificationmark 126 is formed on the second insulation layer 121. The first outerelectrically conductive pattern layer 115, the second outer electricallyconductive pattern layer 125, and the identification mark 126 aresimultaneously formed. The second insulation layer 121 and the innercover layer 140 are made of a transparent material, for example,Polyimide, or Polyester, for example.

The printed circuit board 100 also includes the first outer cover layer150 and the second outer cover layer 160. The first outer cover layer150 is formed at a side of the first outer electrically conductivepattern layer 115, and the second outer cover layer 160 is formed at aside of the second outer electrically conductive pattern layer 125. Thefirst openings 151 and the second opening 152 are defined in the firstouter cover layer 150. The first openings 151 spatially correspond tothe first gold fingers 1152, and the first gold finger 1152 arerespectively exposed through the first openings 151. The second openings152 spatially correspond to the through holes 101, and the secondopenings 152 respectively communicates with the through holes 101. Thethird openings 161 and the fourth openings 162 are defined in the secondouter cover layer 160. The third openings 161 spatially correspond tothe second gold fingers 1252, and the second gold fingers 1252 arerespectively exposed through the third openings 161. The fourth openings162 spatially correspond to the identification marks 126, and the sizeof each fourth opening 162 is larger than the size of the correspondingidentification mark 126. The size of each fourth opening 162 isidentical to the size of the corresponding marking region 124.

In other embodiments, the printed circuit board 100 may have moreelectrically conductive pattern layer. That is, there may be more innerelectrically conductive pattern layers and insulation layersalternatively formed between the connection adhesive sheet 130 and theinner cover layer 140. The blind hole 102 passes through the innerelectrically conductive pattern layers and insulation layersalternatively formed.

In the present embodiment, the second insulation layer 121 and the innercover layer 140 are made of a transparent material, for example,Polyimide, or Polyester, for example. In the hot pressure weldingprocess, it is very easy for the welding machine to identify theidentification mark 126.

Because the identification mark 126, the first gold fingers 1152, andthe second gold fingers 1252 are formed simultaneously, the positiondeviation between the identification mark 126, the first gold finger1152, and the second gold finger 1252 is smaller, and making precisionof the identification mark 126 is higher.

While certain embodiments have been described and exemplified above,various other embodiments will be apparent from the foregoing disclosureto those skilled in the art. The disclosure is not limited to theparticular embodiments described and exemplified but is capable ofconsiderable variation and modification without departure from the scopeand spirit of the appended claims.

What is claimed is:
 1. A method for manufacturing a printed circuitboard, comprising: providing a first circuit board and a second circuitboard, the first circuit substrate comprising a first insulation layer,a first inner electrically conductive pattern layer, and a first copperfoil, the second circuit substrate comprising a second insulation layer,a second inner electrically conductive pattern layer, and a secondcopper foil, the second circuit substrate comprising at least onemarking region, the marking region consisting of the second insulationlayer and the second copper foil; attaching a connection adhesive sheeton the first inner electrically conductive pattern layer and the surfaceof the first circuit substrate exposed at the first inner electricallyconductive pattern layer, and defining at least one through hole in thefirst circuit substrate, the through hole passing through the connectionadhesive sheet and the first circuit substrate, and spatiallycorresponding to the at least marking region; laminating the firstcircuit substrate onto the second circuit substrate, such that theconnection adhesive sheet is sandwiched between the first circuitsubstrate and the second circuit substrate, and the through hole alignedwith the marking region; and converting the first copper foil into afirst outer electrically conductive pattern layer, and converting thesecond copper foil into a second outer electrically conductive patternlayer with at least one identification mark, the identification markbeing arranged in the marking region, the first outer electricallyconductive pattern layer comprising a plurality of first gold fingers,the second outer electrically conductive pattern layer comprising aplurality of second gold fingers.
 2. The method of claim 1, wherein thesecond insulation layer is made of transparent material.
 3. The methodof claim 1, wherein a shape of the identification mark is the same as ashape of a cross-section of the corresponding through hole taken in aplane parallel with the first insulation layer, and a size of theidentification mark is smaller than a size of the cross-section of thecorresponding through hole taken in a plane parallel with the firstinsulation layer.
 4. The method of claim 1, wherein before laminatingthe first circuit substrate onto the second circuit substrate, themethod further comprises a step of attaching an inner cover layer on thesecond inner electrically conductive pattern layer and the surface ofthe second circuit substrate exposed at the second inner electricallyconductive pattern layer, and when the first circuit substrate islaminated onto the second circuit substrate, the connection adhesivesheet is in contact with the inner cover layer.
 5. The method of claim1, wherein the first outer electrically conductive pattern layer furthercomprises a plurality of first electrically conductive traces, the firstelectrically conductive traces are respectively electrically connectedto the corresponding first electrically conductive trace, the secondouter electrically conductive pattern layer further comprises aplurality of second electrically conductive traces, the secondelectrically conductive traces are respectively electrically connectedto the corresponding second electrically conductive trace.
 6. The methodof claim 1, wherein the at least marking region comprises a plurality ofmarking regions, the at least through hole comprises a plurality ofthrough holes, the method further comprises a step of forming a firstouter cover layer on the first outer electrically conductive patternlayer, and a second outer cover layer on the second outer electricallyconductive pattern layer, a plurality of first openings and a pluralityof second opening are defined in the first outer cover layer, the firstopenings spatially corresponds to the first gold fingers, and first goldfingers are respectively exposed through the first openings, the secondopenings spatially correspond to the through holes, and second openingsrespectively communicates with the through holes, a plurality of thirdopenings and fourth openings are defined in the second outer coverlayer, the third openings spatially correspond to the second goldfingers, and gold fingers are respectively exposed through the thirdopenings, the fourth openings spatially correspond to the identificationmarks, and the identification marks are respectively exposed through thefourth openings.
 7. The method of claim 6, wherein a size of across-section of each fourth opening taken in a plane parallel with thesecond insulation layer is larger than a size of the correspondingidentification mark, and a size of the cross-section of each fourthopening taken in a plane parallel with the second insulation layer isidentical to the corresponding marking region.
 8. The method of claim 1,wherein the first outer electrically conductive pattern layer, thesecond outer electrically conductive pattern layer, and the at least oneidentification mark are made using an image-transfer process and anetching process.
 9. A printed circuit board, comprising a first outerelectrically conductive pattern layer, a first insulation layer, a firstinner electrically conductive pattern layer, a connection adhesivesheet, a second inner electrically conductive layer, a second insulationlayer, a second outer electrically conductive pattern layer, and atleast one identification mark which are arranged in that order, at leastone blind hole being defined in the printed circuit board, and passingthrough the first outer electrically conductive pattern layer, the firstinsulation layer, the first inner electrically conductive pattern layer,and the connection adhesive sheet, the first outer electricallyconductive pattern layer comprising a plurality of first gold fingers,the second outer electrically conductive pattern layer comprising aplurality of second gold fingers, the at least one blind holecorresponding to the at least one identification mark, the first outerelectrically conductive pattern layer, the second outer electricallyconductive pattern layer, and the at least one identification mark beingsimultaneously formed.
 10. The printed circuit board of claim 9, whereinthe printed circuit board further comprises an inner cover layersandwiched between the connection adhesive sheet and the second innerelectrically conductive pattern layer.
 11. The printed circuit board ofclaim 9, wherein the second insulation layer is made of transparentmaterial.
 12. The printed circuit board of claim 9, wherein a shape ofthe identification mark is the same as a shape of a cross-section of thecorresponding through hole taken in a plane parallel with the firstinsulation layer, and a size of the identification mark is smaller thana size of the cross-section of the corresponding through hole taken in aplane parallel with the first insulation layer.
 13. The printed circuitboard of claim 9, wherein the printed circuit board further comprises afirst outer cover layer and a second outer cover layer, the first outercover layer is formed on the first outer electrically conductive patternlayer, the second outer cover layer is formed on the second outerelectrically conductive pattern layer, a plurality of first openings anda plurality of second opening are defined in the first outer coverlayer, the first openings spatially corresponds to the first goldfingers, and first gold fingers rare respectively exposed through thefirst openings, the second openings spatially correspond to the throughholes, and the second openings respectively communicate with the throughholes, a plurality of third openings and fourth openings are defined inthe second outer cover layer, the third openings spatially correspond tothe second gold fingers, and the second gold fingers are respectivelyexposed through the third openings, the fourth openings spatiallycorrespond to the identification marks, and the identification marks arerespectively exposed through the fourth openings.
 14. The printedcircuit board of claim 9, wherein a size of a cross-section of eachfourth opening taken in a plane parallel with the second insulationlayer is larger than a size of the corresponding identification mark,and a size of the cross-section of each fourth opening taken in a planeparallel with the second insulation layer is identical to thecorresponding marking region.